I’m building a retro computer!

Somewhere around the time I got bored with Advent of Code 2018 (well, the challenges grew to become total time-sinks), I decided my project for the new year was going to be a homebrew retro computer.

I decided that, rather than something 8-bit based on the Z80 or 6502, I wanted to go up a generation and build something 16-bit. 

Apart from gaming and a bit of BASIC programming on 8-bit machines like the Spectrum and C64, my first “real” computing was done on the Amiga, a machine which still has a special place in my heart today. For that reason, I decided I wanted to build something based on the Motorola 68000 series processor. 

I chose the 68010 which (as far as I’m aware) was never used in the Amiga line, but which is slightly more capable than the 68000 (e.g. interrupt vectors can be moved around and it can support virtual memory when used with a 68451 MMU, though I’m not likely to do the latter in this build). Mine is rated for 10MHz, but I’m only running it at 4MHz at the moment).

The key differences between this and an 8-bit Z80 or 6502 build are:

• Dynamic registers, so the clock cannot be stopped or single-stepped (this can be emulated by manipulating /DTACK though).
• Asynchronous data bus and DMA support, with /BGR, /BGA, /BERR and /DTACK to take care of.
• 16-bit data bus, so more wires needed.
• 24-bit (with some caveats) address bus, so lots more wires needed, but 16MB of address space available!
• Internally, the m68k family is 32-bit.
• /UDS and /LDS lines for selecting upper and lower data bytes, so a more complicated address decoder and ROM/RAM in pairs.
• No separate IO space, further complicating the address decoder.
• More complicated requirements around /RESET and /HALT handling, especially at power-on.

I started gathering parts in January, and so far have the crystal clock circuit, the reset/halt circuit, and have gotten the CPU freerunning with /DTACK grounded and the various other bus management lines tied high or low as appropriate.

The address decoder is designed, and I already have the RAM and ROM chips ready to go. I’ve also built an EEPROM programmer because I’m too impatient/cheap to order one and wait for it to arrive.

All this means that, pretty soon, I should be able to get it running some actual code!

Fun times are ahead! If you’re interested, you can follow the project over on Hackaday.